As integrated devices continue to scale to smaller dimensions, the ability to process small features becomes increasingly difficult. In some examples, generating a target device structure may involve the ability to mask select portions of a device structure. For three dimensional devices such as multigate transistors, masking of target portions of a device may be more difficult than the case for planar devices.
In one example of doping of a finFET (fin field effect transistor), the target region for self-aligned doping may be the bottom part of a fin adjacent the substrate. Accordingly, this type of doping process may call for masking just a portion of the fin.
With respect to these and other considerations the present improvements may be useful.